Updated to the consolidation release 0.9.4. The Fedora Toped package sets the variable $TPD_GLOBAL to /usr/share/toped by default so that the user could run toped out of the box.

Graham Petley and Krustev Svilen provided 2 TELL files as a demonstration how toped can interact with Pharosc Standard Cells via toped’s GDSII and CIF parsers.

Highlights

Fedora Magic has been updated to 8.0.54.

Fedora Magic package has its documentation on a separate package called : magic-doc. The latter includes some examples of scmos and tutorials. Advanced Magic VLSI users would also be interested in reading the documentation again to grasp the fine details entailed in the 8.0 series.

Features:

electric has been updated to 8.09.

Please note that because most of the electric userbase use third party plugins that due to the licensing incompatibilities wih Fedora, FEL can not add those plugins. That said, Fedora Electronic Lab team understands that releasing a new upstream version would break interoperability with the user’s plugins. Hence new versions of electric will once make their way to the updates-testing repository.

New to Fedora 12,Dinotrace is a waveform viewer which understands Verilog Value Change Dumps, ASCII, and other trace formats.

It allows placing cursors, highlighting signals, searching, printing, and other capabilities superior to many commercial waveform viewers.

Dinotrace is optimized for rapid debugging. With VTRACE, a simulation failure will automatically place cursors where errors occur, add comments visible in the wave form viewer. Four mouse clicks and the errors will be highlighted in the log files, and the values of signals at the error will be seen in the source.

Fedora also ships dinotrace-mode for emacs as emacs-dinotrace-mode.

eqntott converts Boolean logic expressions into a truth table that is useful for preparing input to espresso package for logic minimization, converting logic expressions into simpler forms, and for creating truth tables. eqntott is new for Fedora 12.

New for Fedora 12, espresso takes as input a two-level representation of a two-valued (or multiplevalued) Boolean function, and produces a minimal equivalent representation. It is a boolean logic minimization tool.

Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to create executable models of CPUs for embedded software design teams.

VRQ is modular verilog parser that supports plugin tools to process verilog. Multiple tools may be invoked in a pipeline fashion within a single execution of vrq. It is a generic front-end parser with support for plugin backend customizable tools.

Fedora Alliance CVS devel repository got its 100th patch in August 2009, with respect to stability on 64 architecture and we are happy that upstream has applied all our patches for alliance. We have also built this new release for all Fedora supported testing repositories and EPEL-5 testing repository. There is also a new GUI xgra coming with this new release which is a Graph viewer.

We will not replace Alliance VLSI by herb (which was supported to be a fork of alliance) on Fedora. Before F-11’s release, herb development was active but died out after F-11 was released. Since Alliance VLSI upstream is active and responsive to our wishes, there is currently no valid reason behind obsoleting alliance in favour of herb.

This is a new package for Fedora 12.

SystemPerl is a version of the SystemC language. It is designed to expand text so that needless repetition in the language is minimized. By using sp_preproc, SystemPerl files can be expanded into C++ files at compile time, or expanded in place to make them valid stand-alone SystemC files.

perl-Verilog-Perl has been updated to version 3.123. New features include: